Reduce the scheduler priority to a more acceptable level

Allow to check IO CRC independent of the IO start status

Allow to check IO CRC independent of the IO start status (retains the interface status, startet or unstarted

including the math lib adds a huge amount to flash usage

This should reduce the chance of lost data on these ports due to high
interrupt latency

this is important when using UARTs for things like secondary GPS
modules, which may produce large enough transfers that 128 bytes is
not enough.

The 2048 buffer for CDCACM transmit makes mavlink log and parameter
transfer faster

this schedules a reboot rather than rebooting immediately, which means
the FMU gets an ACK for its reboot operation, preventing it from
timing out waiting for the ACK. That makes the timing of the reboot
more consistent, which makes it more reliable for forceupdate